Hot-carrier effects in silicon n-channel MOSFETs were investigated as a function of drain voltage ( V_D ) and gate voltage ( V_G ). Impact ionization, gate injection and interface degradation have been observed for qV_D (ballistic energy limit) below the threshold energies for these processes. Detailed investigations were done for qV_D near and below the threshold energies in conventional (CON) uniformly doped channel, and laterally asymmetrical channel (LAC) and vertical MOSFETs. For large V_D, the substrate current ( I_SUB ) due to impact ionization shows a negative temperature dependence, whereas at low V_D it shows a positive temperature dependence. A detailed investigation of channel length (L) and V_G dependence of this effect in CON devices is presented. Impact ionization in CON and LAC devices are investigated for V_D near and below bandgap voltage. Two peaks are observed in I_SUB vs V_G characteristics at low V_D in CON devices. In LAC devices operated in the forward mode, three peaks are visible. For reverse mode of LAC, signatures of a second peak are observed. Extensive experimental data on L and temperature dependence of these anomalous observations are presented. In all the cases, the first peak was found to be suppressed as the temperature is reduced from 300 to \lnt. The second peak was more distinctly visible at lower temperature and enhanced upon decrease in L. The third peak in the case of LAC operated in the forward mode, enhanced as L and temperature are reduced. Experimental data are analyzed based on Monte-Carlo (MC) simulation data available in the literature and verify the presence of a lattice temperature dependent tail (LTDT) in electron energy distribution (EED) and its broadening due to short-range electron-electron interactions (SREEI). LTDT supports the presence of an electron-phonon interaction (EPI) induced tail to EED. EPI and SREEI can populate the EED beyond the ballistic limit of qV_D. It is shown that the anomalous second peak in I_SUB vs V_G is due to SREEI. We find that SREEI is weakened in long channel devices and for large V_G values. SREEI is essentially a mechanism that redistribute energy gained from electric field and it is weakened due to increase in L and V_G which reduce the peak electric field. By employing one-dimensional self-consistent Poisson-Schroedinger simulations, we have shown that inversion layer quantization can result in an increase in the lowest energy of the electrons near the source side of the channel. This may lead to an effective energy gain of about 40 meV or more depending on V_G. Two-dimensional drift-diffusion analysis has shown that LAC devices operated in the forward mode has a second high field region near the source. The third peak in I_SUB vs V_G is related to this high field region. In this case, since the source electrons are injected directly into a high field region, it is expected that LAC in this mode can be used to experimentally investigate modifications of source EED due to long-range electron-electron interactions predicted by some MC simulation groups. We have also demonstrated gate injection and interface degradation for V_D lower than the Si-SiO_2 barrier height. It was found that the worst case degradation condition depends strongly on gate oxide thickness. The results presented suggest that hot-carrier effects may continue to be important even when the supply voltages are reduced below the threshold energies for the physical processes responsible for these effects.
«Hot-carrier effects in silicon n-channel MOSFETs were investigated as a function of drain voltage ( V_D ) and gate voltage ( V_G ). Impact ionization, gate injection and interface degradation have been observed for qV_D (ballistic energy limit) below the threshold energies for these processes. Detailed investigations were done for qV_D near and below the threshold energies in conventional (CON) uniformly doped channel, and laterally asymmetrical channel (LAC) and vertical MOSFETs. For large V_D,...
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