Due to the recent developments In on-board processors (OBPs), adaptive digital predistortion (DPD) can be directly applied on-board the satellite to mitigate the non-linear distortions introduced by the payload’s high power amplifiers (HPAs) and IMUX/OMUX filters. Moreover, to alleviate the burden on the sampling rates of the digital-to-analog converters (DAC) and analog-to-digital converters (ADCs), often bandlimited DPD solutions are sought. In bandlimited DPD, to utilize low-sampling rate ADCs and DACs, the forward and feedback path bandwidths are restricted using bandpass filters, respectively. This ultimately reduces the power consumption. This paper proposes a novel direct-learning-architecture (DLA)-based bandlimited memory polynomial (MP) DPD for HTS, and compares its performance against a state-of-the-art in-direct learning architecture (IDLA)-based DPD under severe bandlimitation constraints. The simulation results show that the proposed DLA-based DPD outperforms the state-of-the-art (IDLA)-based DPD in terms of linearization performance and lower-sampling rate requirements for the ADCs and DACs.
«Due to the recent developments In on-board processors (OBPs), adaptive digital predistortion (DPD) can be directly applied on-board the satellite to mitigate the non-linear distortions introduced by the payload’s high power amplifiers (HPAs) and IMUX/OMUX filters. Moreover, to alleviate the burden on the sampling rates of the digital-to-analog converters (DAC) and analog-to-digital converters (ADCs), often bandlimited DPD solutions are sought. In bandlimited DPD, to utilize low-sampling rate ADC...
»